Datasheet - Npct750

Secure, non-volatile internal storage for endorsement keys, storage keys, and authorization policies.

The Nuvoton is a single-chip Trusted Platform Module (TPM) designed to provide hardware-based security for PCs and embedded systems. It is fully compliant with the Trusted Computing Group (TCG) TPM 2.0 specifications . Core Technical Specifications

Due to its small footprint and low power consumption, the NPCT750 is integrated into embedded computing platforms. For example, offers industrial motherboards with the NPCT750 soldered onboard, delivering hardware‑rooted security for automation controllers, medical devices, and point‑of‑sale systems.

: Using Platform Configuration Registers (PCRs) to record "measurements" of BIOS and bootloader code to detect unauthorized changes. Conclusion npct750 datasheet

The datasheet provides a detailed pinout diagram essential for PCB routing. While the specific layout depends on the package (VQFN vs. TSSOP), the primary functional pins include: Power supply and ground. CS# (Chip Select): For SPI communication. MISO/MOSI: Data lines for the SPI bus. PIRQ#: Interrupt request line to signal the host processor. Reset#: Hardware reset input. Security Features & Certifications

Active shielding layers over the silicon to prevent micro-probing attacks.

Common Criteria EAL 4+ and FIPS 140-2 Level 2. Interface: Serial Peripheral Interface (SPI). Supply Voltage ( VCCcap V sub cap C cap C end-sub ): 3.3V. Core Technical Specifications Due to its small footprint

This device tree fragment (used for IBM’s Rainier system) places the NPCT750 on the 13th I²C bus (i2c12) at address 0x2e . For SPI‑connected modules, the kernel uses the tpm_tis_spi driver, which has been part of the mainline kernel since version 4.x.

The NPCT750 is built to offload security tasks from the main CPU, ensuring that encryption keys, digital signatures, and platform hashes are processed in an isolated hardware environment.

: Often Common Criteria EAL4+ certified for high-assurance applications. Cryptographic Support : Asymmetric : RSA (up to 2048-bit keys) and ECC. Symmetric : AES for key wrapping. Hashing : SHA-1 and SHA-256. RNG : High-quality hardware-based Random Number Generator. Physical & Integration Details Conclusion The datasheet provides a detailed pinout diagram

The Nuvoton NPCT750 is a robust, feature-rich TPM 2.0 solution that bridges the gap between hardware execution and cryptographic certainty. By referencing its precise electrical schemas, pinouts, and register maps within the official datasheet, engineers can successfully build resilient systems capable of defending against both physical and network-layer vectors of attack.

Both are TPM 2.0 devices with the same core functionality. The difference lies in packaging, pinout, or temperature grade. The AADYX variant is used in Tyan’s 11‑pin SPI modules, while AABWX is the standard 48‑pin QFN chip.

Hardware support for SHA-1 and SHA-256 hashing algorithms. TRNG: A high-quality True Random Number Generator. 2. Communication Interfaces

The base product number “NPCT750” is common to all variants. Always refer to the specific datasheet for each part number before designing or ordering.

Managed by the system firmware (BIOS/UEFI) for platform-level security policies. Hardware Tamper Resistance